Soft-switching · Wide-bandgap power · ΣΔ control
We take motor drives and actuators from "the hardware works but the control loop doesn't" to production-grade: sensorless, deterministic, and efficient. A rare combination of control theory, FPGA real-time implementation, and wide-bandgap (GaN and SiC) power design, in one team.
Consulting & engineering services
Hire our team by the sprint or the engagement to get your motor drive or actuator working. We fix the loops that almost work and de-risk the parts general embedded shops cannot.
FPGA, transistor, gate-driver, and current-sensing choices scored for control performance, second-source availability, and lifecycle risk, before you commit a board. Vendor-neutral, including the trade-offs an application engineer will not raise.
Field-oriented control that starts under load, holds through field-weakening, and runs without a shaft sensor. We fix the loops that "almost work."
Control laws on FPGA with hard, deterministic latency, bit-exact against a reference model, timing-closed. The part general embedded shops cannot deliver.
Gate-drive and dead-time design, thermal and layout review, and MIL-STD-461 pre-scan strategy before you book chamber time.
Independent review of motor-drive and drive power-electronics architectures. Investor and acquirer technical due diligence.
How a diagnostic sprint works
Not sure whether your problem is fixable, how big it is, or which way to build it? A diagnostic sprint answers that on a short, fixed fee, before anyone commits to a full build.
You describe what you are building, or what your motor drive is doing wrong. We tell you whether it is in our wheelhouse, at no charge.
We work from your hardware, data, or model for one to two weeks, reproduce the problem, and trace it to its source.
A written diagnosis, a recommended fix, and an estimate to carry it out. Yours to keep, whether or not we do the work.
A flat $7,500, credited in full against the fix if you commission it within ninety days. The intake call is free.
A problem we solve
A representative engagement, drawn from the kind of work we take on.
A drive that ran fine on the bench stalled under load in the field, ran hot and audible, and failed a pre-compliance EMI scan.
Rebuilt the sensorless estimator to hold through the load step, retuned the current loop on FPGA for deterministic latency, and reworked gate-drive and dead-time timing to pull down high-frequency emissions.
Reliable startup under load, cooler and quieter operation, and margin against the EMI limit, without a filter redesign or new silicon.
Illustrative example, representative of our engagements, not a specific client.
Licensed IP & custom drives
Our soft-switching drive platform lands every switching edge at zero volts. The resonant edge is roughly fifty times gentler than a hard one, and that single change is what lowers the switching loss, the device and insulation stress, and the high-frequency emissions at their source, without changing your silicon.
The efficiency gain scales with bus voltage: it is modest on a low-voltage battery bus, and reaches one to three points in the few-hundred-watt to few-kilowatt class on a 270 to 540 volt bus. This is our core technology, and we deliver it as a product, two ways.
Integrate our soft-switching control and power-stage design into your own product under license. You ship your hardware; we provide the drive technology that makes it quiet and efficient.
We design and deliver a drive built around your motor, envelope, and power level: a turnkey soft-switching stage matched to your application.
Soft switching is delivered as a licensed design or a finished drive, not sold as an hourly engagement. The platform is at bench-prototype stage today: the figures above are what we propose to demonstrate on your machine, not a catalog specification.
Health & prognostics
The same estimator that runs the motor without a shaft sensor also tracks how the machine is changing. Slow drift in the electrical parameters is an early warning, reported over the drive's data link with no added sensors. This comes from the sensing and estimation stack rather than from soft switching, so it does not depend on which power stage it runs on.
Stator resistance tracks winding temperature; inductance and flux shifts flag insulation aging, magnet health, and connection wear.
The drive already measures what it needs to run. Health comes off the same signals, not a bolt-on sensor kit.
Trend the drift and you can predict failures and move from calendar maintenance to condition-based maintenance, exactly what drone uptime and defense actuator programs require.
Why us
Control theory to estimation to FPGA to power stage, designed coherently instead of handed across three vendors.
What we simulate is what ships: bit-exact, documented, timing-closed.
Sensorless at the speed extremes, deterministic-latency digital control, low-EMI soft switching.
Who we work with
Insights
Plain-language technical notes on soft switching, sensorless control, FPGA real-time control, and wide-bandgap power.
Where switching noise actually comes from, and why a gentler edge beats a bigger filter.
Read →Why position estimators fall over at the hard moments, and what it takes to hold through them.
Read →Why "fast on average" is not the same as "on time," and where that gap costs you.
Read →Two wide-bandgap paths, and a straight answer on which fits which application.
Read →The estimator that runs the motor is also a condition sensor. What its parameter drift reveals.
Read →About
Bitstream Dynamics is a boutique engineering firm that takes on a small number of hard problems at a time and does them exceptionally well. Every engagement runs under a clear agreement: your work product is yours; our pre-existing methods stay ours.
Founder & Principal Engineer
PhD in Electrical Engineering, control systems, from the University of California, Santa Barbara. Joseph works across the full stack of a motor drive, from control theory and state estimation to FPGA real-time implementation and wide-bandgap power design, a combination usually split across separate specialists. Bitstream Dynamics is built to keep that whole loop coherent, from the control law to the power stage.
FPGA ΣΔ control brought up on a commercial GaN power stage during bench validation.
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